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SAMSUNG Foundry Forum & Faraday Technology

Posted by David Toombs on May 8, 2018 11:41:39 AM

Please join Faraday Technology at the 3rd Annual SAMSUNG Foundry Forum

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Topics: Faraday Samsung

FARADAY’s ASIC Design & Manufacturing Flow is ISO26262 Qualified – Why should you care?

Posted by David Toombs on Apr 4, 2018 2:40:17 PM

This blog provides an overview of what ISO 26262 covers and how this standard affects the automotive supply chain. If you work in the automotive industry, you should already be well versed with ISO 26262, the international standard for the safety of electrical and/or electronic (E/E) systems in series-production automobiles.

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Topics: FPGA2ASIC

Artificial Intelligence and Faraday's FPGA to ASIC turnkey conversion service

Posted by George Wells on Mar 26, 2018 3:32:00 PM

Many of today’s Artificial Intelligence “AI” chip designs are initially implemented in Field Programmable Gate Arrays “FPGA” for research and development, proof-of-concept, and for low volume production. Artificial Intelligence applications require high speed interfaces of increasingly higher bandwidth, lower power, and lower latency. In order to meet these performance and power requirements, only the highest performance FPGA’s in the most advanced nodes available will meet AI design requirements. These high performance FPGA’s can cost many thousands of dollars apiece.

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Topics: FPGA2ASIC

Faraday Technology and Samsung form new partnership

Posted by George Wells on Feb 20, 2018 5:01:55 PM

Overview

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Faraday Technology and Samsung form new partnership

Posted by David Toombs on Feb 20, 2018 4:15:00 PM

Overview

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Faraday's FPGA to ASIC Turnkey Conversion Service: Advanced Packaging

Posted by George Wells on Feb 20, 2018 3:31:17 PM

Overview: 

In this 3rd in a series of blogs on Faraday’s FPGA-to-ASIC conversion service we highlight how Faraday’s advanced packaging solutions provide increased performance, lower power, smaller area and lower BOM cost.

Faraday has partnered with the industry leaders in advanced package technology, and together we have the ability to integrate 3rd party Known Good Die “KGD” into our packages to provide some of the smallest footprint SIP (System In Package) SOC’s in the industry today. Some examples of Known Good Die include: DDR, FLASH, and EEPROM. We can also integrate sensors as well as passive elements into a SIP design such as L, R, C, etc.

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Faraday's FPGA to ASIC Turnkey Conversion Service: Advanced Packaging

Posted by David Toombs on Feb 16, 2018 2:48:46 PM

Overview: 

In this 3rd in a series of blogs on Faraday’s FPGA-to-ASIC conversion service we highlight how Faraday’s advanced packaging solutions provide increased performance, lower power, smaller area and lower BOM cost.

Faraday has partnered with the industry leaders in advanced package technology, and together we have the ability to integrate 3rd party Known Good Die “KGD” into our packages to provide some of the smallest footprint SIP (System In Package) SOC’s in the industry today. Some examples of Known Good Die include: DDR, FLASH, and EEPROM. We can also integrate sensors as well as passive elements into a SIP design such as L, R, C, etc.

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Faraday's FPGA to ASIC Turnkey Conversion Service

Posted by George Wells on Jan 8, 2018 4:04:26 PM

Overview

In this 2nd in a series of blogs on Faraday’s FPGA-to-ASIC conversion service we highlight how Faraday is able to provide increased performance, lower power, smaller area, lower BOM cost. In addition we will showcase how Faraday intellectual property can be leveraged to integrate high-value functions at minimal cost and risk.

It is often the case that a Systems company produces their first design using a mix of multiple FPGA’s and multiple Application Specific Standard Products “ASSP’s” for Proof Of Concept and/or low volume initial product introduction. With Faraday’s FPGA-to-ASIC silicon proven conversion service, it is possible to seamlessly convert several FPGA’s and ASSP’s into one single ASIC. Or, in the case of systems built around microcontrollers or microprocessors, integration into a single System On Chip “SoC” featuring an integrated ARM™ or RISC-V™ core among others.

Faraday’s FPGA-to-ASIC conversion service can transform an FPGA-based design by combining other board level ASSP’s, Analog functions and discrete components into a single ASIC or SoC, while maintaining original design fidelity. Faraday has successfully implemented many FPGA conversion projects including the applications in industrial motor control, smart meters, digital billboards, POS terminals, and handheld medical devices.

fpga2asic-1.jpg

Today’s high-end FPGA’s are manufactured in advanced process nodes such as 22nm and 16FF. It is possible to capture and replicate the same FPGA design in a 55nm or 40nm process node with equivalent or even higher performance, lower power, smaller area, and much lower per part cost.

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Topics: Insider

Faraday Offers FPGA to ASIC Turnkey Conversion Service

Posted by David Toombs on Nov 20, 2017 10:52:05 AM

Introduction: 

A Field Programmable Gate Array (FPGA) is a semiconductor IC or Integrated Circuit which can be programmed any time after manufacturing. The FPGA consists of a matrix of CLB’s (Configurable Logic Blocks) containing LUT’s (Look-Up-Tables), the basic elements which can be made into any kind of logic gate. FPGA’s are programmed using design languages such as Verilog or VHDL.

In contrast, an Application-Specific Integrated Circuit or ASIC is a kind of integrated circuit that is customized for a specific application or purpose. Compared to a programmable logic device or a standard logic integrated circuit, an ASIC implementation can dramatically improve performance because it is specifically designed to do one thing and do this one thing exceptionally well. ASIC’s can be optimized for cost, performance, area, and power.

FPGA’s offer many advantages in bringing a product to market:

  • FPGA’s are better suited for prototyping and for low volume production.
  • FPGA’s can be implemented faster than other device types.
  • FPGA’s can be re-programmed or reused any number of times. FPGA’s can also be programmed from remote locations. 
  • FPGA development has a low up-front cost burden due to less costly tools and no NRE.  In the FPGA design flow, software takes care of routing, placement and timing, which eliminates time consuming floor planning, timing analysis and place-and-route. 

However, with the benefits of an FPGA design flow, there are certain considerations and disadvantages one must take into account:

  • Cost – Modern high performance FPGA’s can cost thousands of dollars apiece. Customers often under-estimate the life-time usage quantity of FPGA's in their products. While the cost of market entry is low, the FPGA per part cost can prevent mass market expansion limiting long term growth opportunity for the product.
  • FPGA’s consume more power than a custom ASIC. FPGA designers do not have any control on power optimization in FPGA. Power optimization is a key market driver for Mobile, Wireless and Handheld markets. With an ASIC, there are no such limitations. The ASIC designer has full control over power optimization schemes.
  • Once any particular FPGA is selected and used in the design, programmers need to make use of the existing hardware resources available on the FPGA, as these resources are fixed. This will limit the design size and features. Therefore, the FPGA designer must select the optimal FPGA at the beginning of the design cycle, taking into account all technical and business constraints including cost, area, performance, power, and lifetime supply.
  • End-Of-Life – FPGA vendors on occasion will EOL or End-Of-Life a product. This means that the customer must purchase an up-front lifetime volume, typically resulting in millions of dollars in unbudgeted costs, while they search for a long term replacement solution. In contrast, certain ASIC providers such as Faraday and our Foundry, UMC, never EOL process nodes.
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